
    cpu_beha[cpu_gates]
  where

    process cpu_beha[cpu_gates] : noexit :=
      cpu_behaAux [cpu_gates] 
	(Bit (X)#X#X#X#X#X#X#X#X, 
	Bit (X)#X#X#X, 
	X of Bit,
	Bit (X)#X#X#X,
	Bit (X)#X#X#X,
	Bit (X)#X#X#X,
	Bit (X)#X#X#X,
	X of Bit, X of Bit,
	Bit (X)#X#X#X,     
	Bit (X)#X#X#X,
	X of Bit)
    
      where
      
      process cpu_behaAux [cpu_gates]
        (dtIR,dtDtIn : BitArray, dtClk : Bit,
         MWire(4,dtR) : BitArray,dtFlag1,dtFlag0 : Bit,
         dtBusAorMArr, dtBusBorDtOut : BitArray,dtMW : Bit) : noexit :=
    
	IR ? dtIR: BitArray;
	cpu_behaAux [cpu_gates] (cpu_pars)
      []
	DtIn ? dtDtIn: BitArray;
	cpu_behaAux [cpu_gates] (cpu_pars) 
      []
	Clk ? newdtClk: Bit;
	(
	  [(dtClk ne 0 of Bit) or (newdtClk ne 1 of Bit) or (dtIR eq Bit (x))] ->
	    cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))   
	[]
	  [(dtClk eq 0 of Bit) and (newdtClk eq 1 of Bit) and (dtIR ne Bit (x))] ->
	    ( 
	      [(dtIR.natnum(7) eq 0 of Bit) and (dtIR.natnum(6) eq 1 of Bit)] -> (* store *)
		cpu_behaAux [cpu_gates]
		  (Pars(dtClk,`cpu_pars')) (* end of store *)
	    []
	      [(dtIR.natnum(7) eq 1 of Bit) and (dtIR.natnum(6) eq 0 of Bit)] -> (* load *)
		(
		  [(dtDtIn eq Bit (x)) and (dtIR.natnum(8) eq 0 of Bit) ] ->
		    cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))           
		[]
		  [dtDtIn ne Bit (x)  or (dtIR.natnum(8) eq 1 of Bit) ] ->
		    (
		      let newreg: BitArray = 
			Bit(dtIR.natnum(3)) # (dtIR.natnum(2)) #
			  (dtIR.succ(0)) # (dtIR.0) in
			(
			  [(dtIR.natnum(5) eq 0 of Bit) and (dtIR.natnum(4) eq 0 of Bit)] ->
			    (
			      [(dtR0 ne dtDtIn) and (dtIR.natnum(8) eq 0 of Bit)] ->
				R0 ! dtDtIn;
				(
				  let dtR0: BitArray = dtDtIn in
				    cpu_behaAux [cpu_gates]
				      (Pars(dtClk,`cpu_pars'))  
				)               
			    []
			      [(dtR0 eq dtDtIn) and (dtIR.natnum(8) eq 0 of Bit)] ->             
			        cpu_behaAux [cpu_gates]
				  (Pars(dtClk,`cpu_pars'))                 
			    []
			      [(dtIR.natnum(8) eq 1 of Bit) and (dtR0 ne newreg)] ->
				R0 !  newreg;
				(
				  let dtR0 : BitArray = newreg in
				    cpu_behaAux [cpu_gates]
				      (Pars(dtClk,`cpu_pars'))   
				)             
			    []
			      [(dtIR.natnum(8) eq 1 of Bit) and (dtR0 eq newreg)] ->
				cpu_behaAux [cpu_gates]
				  (Pars(dtClk,`cpu_pars'))                 
			    )
			[]
			  [(dtIR.natnum(5) eq 0 of Bit) and (dtIR.natnum(4) eq 1 of Bit)] ->
			    (
			      [(dtR1 ne dtDtIn) and (dtIR.natnum(8) eq 0 of Bit)] ->
			      R1 ! dtDtIn;
			      (
				let dtR1 : BitArray = dtDtIn  in
				  cpu_behaAux [cpu_gates]
				    (Pars(dtClk,`cpu_pars'))
			      ) 
			      []
			      [(dtR1 eq dtDtIn) and (dtIR.natnum(8) eq 0 of Bit)] ->             
			      cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars')) 
			      []
				[(dtIR.natnum(8) eq 1 of Bit) and (dtR1 ne newreg)] ->
				R1 !  newreg;
				(
				  let dtR1 : BitArray = newreg in
				    cpu_behaAux [cpu_gates]
				      (Pars(dtClk,`cpu_pars')) 
				)
			      []
			      [(dtIR.natnum(8) eq 1 of Bit) and (dtR1 eq newreg)] ->
				cpu_behaAux [cpu_gates]
				  (Pars(dtClk,`cpu_pars'))
			      )
		    []
		      [(dtIR.natnum(5) eq 1 of Bit) and (dtIR.natnum(4) eq 0 of Bit)] ->
		      (
			[(dtIR.natnum(8) eq 0 of Bit) and (dtR2 ne dtDtIn)] ->
			  R2 ! dtDtIn;
			  (
			    let dtR2 : BitArray = dtDtIn  in
			      cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))
			  ) 
			[]
			  [(dtIR.natnum(8) eq 0 of Bit) and (dtR2 eq dtDtIn)] ->             
			    cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))
			[]
			  [(dtIR.natnum(8) eq 1 of Bit) and (dtR2 ne newreg)] ->
			  R2 !  newreg;
			  (
			    let dtR2 : BitArray = newreg  in
			      cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))
			  ) 
			[]
			  [(dtIR.natnum(8) eq 1 of Bit) and (dtR2 eq newreg)] ->
			    cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))
			)
		    []
		      [(dtIR.natnum(5) eq 1 of Bit) and (dtIR.natnum(4) eq 1 of Bit)] ->
			(
			  [(dtIR.natnum(8) eq 0 of Bit) and (dtR3 ne dtDtIn)] ->               
			    R3 ! dtDtIn;
			    (
			      let dtR3 : BitArray = dtDtIn  in
				cpu_behaAux [cpu_gates]
				  (Pars(dtClk,`cpu_pars'))
			    )
			[]
			  [(dtIR.natnum(8) eq 0 of Bit) and (dtR3 eq dtDtIn)] ->             
			    cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))
			[]
			  [(dtIR.natnum(8) eq 1 of Bit) and (dtR3 ne newreg)] ->
			    R3 !  newreg;
			    (
			      let dtR3 : BitArray = newreg  in
				cpu_behaAux [cpu_gates]
				  (Pars(dtClk,`cpu_pars'))
			    )
			[]
			  [(dtIR.natnum(8) eq 1 of Bit) and (dtR3 eq newreg)] ->                 
			    cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))
			  )
			) (* end of let *)
		    ) (* end of dtDtIn ne Bit (x) *)
		) (* end of load *)
	      []
		[((dtIR.natnum(7) eq 0 of Bit) and (dtIR.natnum(6) eq 0 of Bit)) or
		((dtIR.natnum(7) eq 1 of Bit) and (dtIR.natnum(6) eq 1 of Bit)) ] -> 
		  (
		    (
		      (
			[(dtIR.succ(0) eq 0 of Bit) and (dtIR.0 eq 0 of Bit)] ->
			  exit(any BitArray, dtR0)
		      []
			[(dtIR.succ(0) eq 0 of Bit) and (dtIR.0 eq 1 of Bit)] ->
			  exit(any BitArray, dtR1)
		      []
			[(dtIR.succ(0) eq 1 of Bit) and (dtIR.0 eq 0 of Bit)] ->
			  exit(any BitArray, dtR2)
		      []
			[(dtIR.succ(0) eq 1 of Bit) and (dtIR.0 eq 1 of Bit)] ->
			  exit(any BitArray, dtR3)
		      )
		    |||
		      (
		        [(dtIR.natnum(3) eq 0 of Bit) and (dtIR.natnum(2) eq 0 of Bit)] ->
			  exit(dtR0, any BitArray)
		      [] 
		        [(dtIR.natnum(3) eq 0 of Bit) and (dtIR.natnum(2) eq 1 of Bit)] ->
		          exit(dtR1, any BitArray)
		      []
		        [(dtIR.natnum(3) eq 1 of Bit) and (dtIR.natnum(2) eq 0 of Bit)] ->
		          exit(dtR2, any BitArray)
		      []
		        [(dtIR.natnum(3) eq 1 of Bit) and (dtIR.natnum(2) eq 1 of Bit)] ->
		          exit(dtR3, any BitArray)
		      )
		    ) (* end of interleaving *)       
		  >> accept dtBusAorMArr,  dtBusBorDtOut : BitArray in
		    ( 
		      [(dtBusAorMArr eq Bit (x)) or ( dtBusBorDtOut eq Bit (x))] ->
		        cpu_behaAux [cpu_gates] (Pars(dtClk,`cpu_pars'))           
		    []
		      [(dtBusAorMArr ne Bit (x)) and (dtBusBorDtOut ne Bit (x))] ->
		        (
			  [(dtIR.natnum(7) eq 0 of Bit) and (dtIR.natnum(6) eq 0 of Bit)] ->  (* cmp *)
			    ( 
			      [dtBusAorMArr eq dtBusBorDtOut] -> 
			      (
			        [dtFlag0 ne 1 of Bit] ->
				  Flag0 ! 1 of Bit;
				  (
				    let dtFlag0 : Bit = 1 of Bit in 
				      cpu_behaAux [cpu_gates]
				        (Pars(dtClk,`cpu_pars'))
				  )                     
			      []
			        [dtFlag0 eq 1 of Bit] ->              
				  cpu_behaAux [cpu_gates]
				    (Pars(dtClk,`cpu_pars'))
			      )
			    []
			      [dtBusAorMArr ne dtBusBorDtOut] -> 
				(
				  [dtFlag0 ne 0 of Bit] ->
				    Flag0 ! 0 of Bit;
				    (
				      let dtFlag0 : Bit = 0 of Bit in
				        cpu_behaAux [cpu_gates]
					  (Pars(dtClk,`cpu_pars'))
				    )
				[]
				  [dtFlag0 eq 0 of Bit] ->              
				    cpu_behaAux [cpu_gates]
				      (Pars(dtClk,`cpu_pars'))
				)      
			    ) (* end of cmp *)
			  []
			    [(dtIR.natnum(Dec(7)) eq 1 of Bit) and (dtIR.natnum(6) eq 1 of Bit)] -> (* add *)
			      (
			        let newdtDr : BitArray =
				 dtBusAorMArr + dtBusBorDtOut,
			          newdtCarry : Bit =
				   carry(dtBusAorMarr,dtBusBorDtOut) in
				  (
				    (
				      [(dtIR.natnum(5) eq 0 of Bit) and (dtIR.natnum(4) eq 0 of Bit)] ->
					(
					  [dtR0 ne newdtDr] ->
					    R0 ! newdtDr;
					    exit(dtR3,dtR2,dtR1,newdtDr,any Bit)
					[]
					  [dtR0 eq newdtDr ] ->             
					    exit(dtR3,dtR2,dtR1,newdtDr,any Bit)
					)
				    []
				      [(dtIR.natnum(5) eq 0 of Bit) and
				       (dtIR.natnum(4) eq 1 of Bit)] ->
					(
					  [dtR1 ne newdtDr] ->
					    R1 ! newdtDr;
					    exit(dtR3,dtR2,newdtDr,dtR0,any Bit) 
					[]
					  [dtR1 eq newdtDr] ->             
					    exit(dtR3,dtR2,newdtDr,dtR0,any Bit)
					)
				    []
				      [(dtIR.natnum(5) eq 1 of Bit) and
				       (dtIR.natnum(4) eq 0 of Bit)] ->
					(
					  [dtR2 ne newdtDr] ->
					    R2 ! newdtDr;
					    exit(dtR3,newdtDr,dtR1,dtR0,any Bit)
					[]
					  [dtR2 eq newdtDr] ->             
					    exit(dtR3,newdtDr,dtR1,dtR0,any Bit) 
					)
				    []
				      [(dtIR.natnum(5) eq 1 of Bit) and
				       (dtIR.natnum(4) eq 1 of Bit)] ->
					(
					  [dtR3 ne newdtDr] ->
					    R3 ! newdtDr;
					    exit(newdtDr,dtR2,dtR1,dtR0,any Bit)
					[]
					  [dtR3 eq newdtDr] ->             
					    exit(newdtDr,dtR2,dtR1,dtR0,any Bit) 
					)
				    ) (* end of register changing *)
				  |||
				    (
				      [dtFlag1 ne newdtCarry] ->
					Flag1 ! newdtCarry;
					exit(MWire(4,any BitArray=), newdtCarry)
				    []
				      [dtFlag1 eq newdtCarry] ->
					exit(MWire(4,any BitArray=), newdtCarry)
				    ) (* end of flag1 changing *) 
				  ) (* end of let *)
				>>
				  accept MWire(4,dtR) : BitArray,
				   dtFlag1 : Bit in
				    cpu_behaAux [cpu_gates]
				      (Pars(dtClk,`cpu_pars'))                  
			    ) (* end of add *)
		        ) (* end of sourceA and sourceB ne Bit (x) *)
		    ) (* end of accept of BusA and BusB *)   
		  ) (* end of add or cmp *) 
	    ) (* end of appropriate transition *)
	) (* end of Clk *)
      []
        [(((dtIR.natnum(7) eq 0 of Bit) and (dtIR.natnum(6) eq 0 of Bit)) or
	 ((dtIR.natnum(7) eq 1 of Bit) and (dtIR.natnum(6) eq 0 of Bit)) or
	  ((dtIR.natnum(7) eq 1 of Bit) and (dtIR.natnum(6) eq 1 of Bit))) and
	   (dtMW ne 0 of Bit)] ->
	MW ! 0 of Bit;
	(
	  let dtMW : Bit = 0 of Bit in
	    cpu_behaAux [cpu_gates] (cpu_pars)
	)
      []
        [(dtIR.natnum(Dec(7)) eq 0 of Bit) and (dtIR.natnum(6) eq 1 of Bit)
	 and (dtMW ne 1 of Bit) ] -> (* store *)
	  MW ! 1 of Bit;
	  (
	    let dtMW : Bit = 1 of Bit in
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  )                 
      []     
        [(dtIR.natnum(3) eq 0 of Bit) and (dtIR.natnum(2) eq 0 of Bit) and 
	 (dtR0 ne dtBusAorMArr) and (dtR0 ne Bit (X)) ] ->
	  BusAorMArr ! dtR0;
          (
	    let dtBusAorMArr : BitArray = dtR0 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  )
      []
        [(dtIR.natnum(3)  eq 0 of Bit) and (dtIR.natnum(2) eq 1 of Bit) and 
	 (dtR1 ne dtBusAorMArr) and (dtR1 ne Bit (X))] ->
	  BusAorMArr ! dtR1;
	  (
	    let dtBusAorMArr : BitArray = dtR1 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  ) 
      []
	[(dtIR.natnum(3)  eq 1 of Bit) and (dtIR.natnum(2)  eq 0 of Bit) and 
	 (dtR2 ne dtBusAorMArr) and (dtR2 ne Bit (X))] ->
	  BusAorMArr ! dtR2;
	  (
	    let dtBusAorMArr : BitArray = dtR2 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  )       
      []
	[(dtIR.natnum(3)  eq 1 of Bit) and (dtIR.natnum(2)  eq 1 of Bit) and 
	(dtR3 ne dtBusAorMArr) and (dtR3 ne Bit (X))] ->
	  BusAorMArr ! dtR3;
	  (
	    let dtBusAorMArr : BitArray = dtR3 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  )                
      []
	[(dtIR.succ(0) eq 0 of Bit) and (dtIR.0 eq 0 of Bit) and
	  (dtR0 ne dtBusBorDtOut) and (dtR0 ne Bit (X))] ->
	    BusBorDtOut ! dtR0 ;
	    (
	      let dtBusBorDtOut : BitArray = dtR0 in 
	        cpu_behaAux [cpu_gates] (cpu_pars)
	    )                 
      []
	[(dtIR.succ(0) eq 0 of Bit) and (dtIR.0 eq 1 of Bit) and
	 (dtR1 ne dtBusBorDtOut) and (dtR1 ne Bit (X))] ->
	  BusBorDtOut ! dtR1 ;
	  (
	    let dtBusBorDtOut : BitArray = dtR1 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  )  
		
      []
	[(dtIR.succ(0) eq 1 of Bit) and (dtIR.0 eq 0 of Bit) and
	 (dtR2 ne dtBusBorDtOut) and (dtR2 ne Bit (X))] ->
	  BusBorDtOut ! dtR2 ;
	  (
	    let dtBusBorDtOut : BitArray = dtR2 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  ) 
      []
	[(dtIR.succ(0) eq 1 of Bit) and (dtIR.0 eq 1 of Bit) and
	 (dtR3 ne dtBusBorDtOut) and (dtR3 ne Bit (X))] ->
	  BusBorDtOut ! dtR3 ;
	  (
	    let dtBusBorDtOut : BitArray = dtR3 in 
	      cpu_behaAux [cpu_gates] (cpu_pars)
	  ) 
      endproc (* cpu_behaAux *)
      
    endproc (* cpu_beha *)
